Mapping of an MPEG-4 Shape-Texture Decoder onto an On-chip Multiprocessor

Key words: performance evaluation; network-on-chip; data flow graph; job scheduling

This paper presents a mapping approach targeting a distributed-memory on-chip multiprocessor platform. A differentiating factor of our approach is that we strive to ensure predictable performance. The approach is biased towards video-decoding application domain, and we a use the MPEG-4 shape-texture decoder job of [2] as a case study. We map that job to three processors and obtain the job worst-case execution time (JWCET) for predictable performance. However, highly dynamic data-dependent behavior of this benchmark can lead to huge overestimations of JWCET even when employing the approach of [1], which uses run-time knowledge of input data parameters. We improve this approach, by introducing scenarios, similar to [3]. For some reference input data stream, the use of scenarios has reduced JWCET overestimation from 177% to 55%.

  1. P. Poplavko, T. Basten, M. Bekooij, J. van Meerbergen, B. Mesman. Task-level Timing Models for Guaranteed Performance in Multiprocessor Networks-on-Chip. In Compilers, Architecture, and Synthesis for Embedded Systems, International Conference, CASES 2003, Proceedings, pages 63-72. San Jose, CA, USA, 30 October - 1 November 2003. ACM Press, New York, USA, 2003. ACM Press, New York, NY, USA, 2003.
  2. M. Pastrnak, P. Poplavko, P.H.N. de With, J. van Meerbergen, On Resource Estimation of MPEG-4 Video Decoding for A Multiprocessor Architecture. In PROGRESS 2003, 4th Progress seminar on embedded systems, Proceedings. Niewegein, the Netherlands, 22 October 2003. Progress/STW Technology Foundation, Utrecht, the Netherlands, 2003.
  3. P. Yang, et al. Managing Dynamic Concurrent Tasks in Embedded Real-Time Multimedia Systems. In 15th International Symposium on System Synthesis, ISSS 2002, Proceedings, pages 112-119. Kyoto, Japan, 2-4 October 2002. ACM Press, New York, USA, 2002.

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